Current File : //lib/modules/6.8.0-60-generic/build/arch/mips/include/asm/octeon/cvmx-fpa-defs.h
/***********************license start***************
 * Author: Cavium Networks
 *
 * Contact: support@caviumnetworks.com
 * This file is part of the OCTEON SDK
 *
 * Copyright (c) 2003-2012 Cavium Networks
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this file; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 * or visit http://www.gnu.org/licenses/.
 *
 * This file may also be available under a different license from Cavium.
 * Contact Cavium Networks for more information
 ***********************license end**************************************/

#ifndef __CVMX_FPA_DEFS_H__
#define __CVMX_FPA_DEFS_H__

#define CVMX_FPA_ADDR_RANGE_ERROR (CVMX_ADD_IO_SEG(0x0001180028000458ull))
#define CVMX_FPA_BIST_STATUS (CVMX_ADD_IO_SEG(0x00011800280000E8ull))
#define CVMX_FPA_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180028000050ull))
#define CVMX_FPA_FPF0_MARKS (CVMX_ADD_IO_SEG(0x0001180028000000ull))
#define CVMX_FPA_FPF0_SIZE (CVMX_ADD_IO_SEG(0x0001180028000058ull))
#define CVMX_FPA_FPF1_MARKS CVMX_FPA_FPFX_MARKS(1)
#define CVMX_FPA_FPF2_MARKS CVMX_FPA_FPFX_MARKS(2)
#define CVMX_FPA_FPF3_MARKS CVMX_FPA_FPFX_MARKS(3)
#define CVMX_FPA_FPF4_MARKS CVMX_FPA_FPFX_MARKS(4)
#define CVMX_FPA_FPF5_MARKS CVMX_FPA_FPFX_MARKS(5)
#define CVMX_FPA_FPF6_MARKS CVMX_FPA_FPFX_MARKS(6)
#define CVMX_FPA_FPF7_MARKS CVMX_FPA_FPFX_MARKS(7)
#define CVMX_FPA_FPF8_MARKS (CVMX_ADD_IO_SEG(0x0001180028000240ull))
#define CVMX_FPA_FPF8_SIZE (CVMX_ADD_IO_SEG(0x0001180028000248ull))
#define CVMX_FPA_FPFX_MARKS(offset) (CVMX_ADD_IO_SEG(0x0001180028000008ull) + ((offset) & 7) * 8 - 8*1)
#define CVMX_FPA_FPFX_SIZE(offset) (CVMX_ADD_IO_SEG(0x0001180028000060ull) + ((offset) & 7) * 8 - 8*1)
#define CVMX_FPA_INT_ENB (CVMX_ADD_IO_SEG(0x0001180028000048ull))
#define CVMX_FPA_INT_SUM (CVMX_ADD_IO_SEG(0x0001180028000040ull))
#define CVMX_FPA_PACKET_THRESHOLD (CVMX_ADD_IO_SEG(0x0001180028000460ull))
#define CVMX_FPA_POOLX_END_ADDR(offset) (CVMX_ADD_IO_SEG(0x0001180028000358ull) + ((offset) & 15) * 8)
#define CVMX_FPA_POOLX_START_ADDR(offset) (CVMX_ADD_IO_SEG(0x0001180028000258ull) + ((offset) & 15) * 8)
#define CVMX_FPA_POOLX_THRESHOLD(offset) (CVMX_ADD_IO_SEG(0x0001180028000140ull) + ((offset) & 15) * 8)
#define CVMX_FPA_QUE0_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(0)
#define CVMX_FPA_QUE1_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(1)
#define CVMX_FPA_QUE2_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(2)
#define CVMX_FPA_QUE3_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(3)
#define CVMX_FPA_QUE4_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(4)
#define CVMX_FPA_QUE5_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(5)
#define CVMX_FPA_QUE6_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(6)
#define CVMX_FPA_QUE7_PAGE_INDEX CVMX_FPA_QUEX_PAGE_INDEX(7)
#define CVMX_FPA_QUE8_PAGE_INDEX (CVMX_ADD_IO_SEG(0x0001180028000250ull))
#define CVMX_FPA_QUEX_AVAILABLE(offset) (CVMX_ADD_IO_SEG(0x0001180028000098ull) + ((offset) & 15) * 8)
#define CVMX_FPA_QUEX_PAGE_INDEX(offset) (CVMX_ADD_IO_SEG(0x00011800280000F0ull) + ((offset) & 7) * 8)
#define CVMX_FPA_QUE_ACT (CVMX_ADD_IO_SEG(0x0001180028000138ull))
#define CVMX_FPA_QUE_EXP (CVMX_ADD_IO_SEG(0x0001180028000130ull))
#define CVMX_FPA_WART_CTL (CVMX_ADD_IO_SEG(0x00011800280000D8ull))
#define CVMX_FPA_WART_STATUS (CVMX_ADD_IO_SEG(0x00011800280000E0ull))
#define CVMX_FPA_WQE_THRESHOLD (CVMX_ADD_IO_SEG(0x0001180028000468ull))
#define CVMX_FPA_CLK_COUNT (CVMX_ADD_IO_SEG(0x00012800000000F0ull))

union cvmx_fpa_addr_range_error {
	uint64_t u64;
	struct cvmx_fpa_addr_range_error_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_38_63:26;
		uint64_t pool:5;
		uint64_t addr:33;
#else
		uint64_t addr:33;
		uint64_t pool:5;
		uint64_t reserved_38_63:26;
#endif
	} s;
};

union cvmx_fpa_bist_status {
	uint64_t u64;
	struct cvmx_fpa_bist_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_5_63:59;
		uint64_t frd:1;
		uint64_t fpf0:1;
		uint64_t fpf1:1;
		uint64_t ffr:1;
		uint64_t fdr:1;
#else
		uint64_t fdr:1;
		uint64_t ffr:1;
		uint64_t fpf1:1;
		uint64_t fpf0:1;
		uint64_t frd:1;
		uint64_t reserved_5_63:59;
#endif
	} s;
};

union cvmx_fpa_ctl_status {
	uint64_t u64;
	struct cvmx_fpa_ctl_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_21_63:43;
		uint64_t free_en:1;
		uint64_t ret_off:1;
		uint64_t req_off:1;
		uint64_t reset:1;
		uint64_t use_ldt:1;
		uint64_t use_stt:1;
		uint64_t enb:1;
		uint64_t mem1_err:7;
		uint64_t mem0_err:7;
#else
		uint64_t mem0_err:7;
		uint64_t mem1_err:7;
		uint64_t enb:1;
		uint64_t use_stt:1;
		uint64_t use_ldt:1;
		uint64_t reset:1;
		uint64_t req_off:1;
		uint64_t ret_off:1;
		uint64_t free_en:1;
		uint64_t reserved_21_63:43;
#endif
	} s;
	struct cvmx_fpa_ctl_status_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_18_63:46;
		uint64_t reset:1;
		uint64_t use_ldt:1;
		uint64_t use_stt:1;
		uint64_t enb:1;
		uint64_t mem1_err:7;
		uint64_t mem0_err:7;
#else
		uint64_t mem0_err:7;
		uint64_t mem1_err:7;
		uint64_t enb:1;
		uint64_t use_stt:1;
		uint64_t use_ldt:1;
		uint64_t reset:1;
		uint64_t reserved_18_63:46;
#endif
	} cn30xx;
};

union cvmx_fpa_fpfx_marks {
	uint64_t u64;
	struct cvmx_fpa_fpfx_marks_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_22_63:42;
		uint64_t fpf_wr:11;
		uint64_t fpf_rd:11;
#else
		uint64_t fpf_rd:11;
		uint64_t fpf_wr:11;
		uint64_t reserved_22_63:42;
#endif
	} s;
};

union cvmx_fpa_fpfx_size {
	uint64_t u64;
	struct cvmx_fpa_fpfx_size_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_11_63:53;
		uint64_t fpf_siz:11;
#else
		uint64_t fpf_siz:11;
		uint64_t reserved_11_63:53;
#endif
	} s;
};

union cvmx_fpa_fpf0_marks {
	uint64_t u64;
	struct cvmx_fpa_fpf0_marks_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_24_63:40;
		uint64_t fpf_wr:12;
		uint64_t fpf_rd:12;
#else
		uint64_t fpf_rd:12;
		uint64_t fpf_wr:12;
		uint64_t reserved_24_63:40;
#endif
	} s;
};

union cvmx_fpa_fpf0_size {
	uint64_t u64;
	struct cvmx_fpa_fpf0_size_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_12_63:52;
		uint64_t fpf_siz:12;
#else
		uint64_t fpf_siz:12;
		uint64_t reserved_12_63:52;
#endif
	} s;
};

union cvmx_fpa_fpf8_marks {
	uint64_t u64;
	struct cvmx_fpa_fpf8_marks_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_22_63:42;
		uint64_t fpf_wr:11;
		uint64_t fpf_rd:11;
#else
		uint64_t fpf_rd:11;
		uint64_t fpf_wr:11;
		uint64_t reserved_22_63:42;
#endif
	} s;
};

union cvmx_fpa_fpf8_size {
	uint64_t u64;
	struct cvmx_fpa_fpf8_size_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_12_63:52;
		uint64_t fpf_siz:12;
#else
		uint64_t fpf_siz:12;
		uint64_t reserved_12_63:52;
#endif
	} s;
};

union cvmx_fpa_int_enb {
	uint64_t u64;
	struct cvmx_fpa_int_enb_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_50_63:14;
		uint64_t paddr_e:1;
		uint64_t reserved_44_48:5;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t reserved_44_48:5;
		uint64_t paddr_e:1;
		uint64_t reserved_50_63:14;
#endif
	} s;
	struct cvmx_fpa_int_enb_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_28_63:36;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t reserved_28_63:36;
#endif
	} cn30xx;
	struct cvmx_fpa_int_enb_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_50_63:14;
		uint64_t paddr_e:1;
		uint64_t res_44:5;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t res_44:5;
		uint64_t paddr_e:1;
		uint64_t reserved_50_63:14;
#endif
	} cn61xx;
	struct cvmx_fpa_int_enb_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_44_63:20;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t reserved_44_63:20;
#endif
	} cn63xx;
	struct cvmx_fpa_int_enb_cn68xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_50_63:14;
		uint64_t paddr_e:1;
		uint64_t pool8th:1;
		uint64_t q8_perr:1;
		uint64_t q8_coff:1;
		uint64_t q8_und:1;
		uint64_t free8:1;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t free8:1;
		uint64_t q8_und:1;
		uint64_t q8_coff:1;
		uint64_t q8_perr:1;
		uint64_t pool8th:1;
		uint64_t paddr_e:1;
		uint64_t reserved_50_63:14;
#endif
	} cn68xx;
};

union cvmx_fpa_int_sum {
	uint64_t u64;
	struct cvmx_fpa_int_sum_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_50_63:14;
		uint64_t paddr_e:1;
		uint64_t pool8th:1;
		uint64_t q8_perr:1;
		uint64_t q8_coff:1;
		uint64_t q8_und:1;
		uint64_t free8:1;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t free8:1;
		uint64_t q8_und:1;
		uint64_t q8_coff:1;
		uint64_t q8_perr:1;
		uint64_t pool8th:1;
		uint64_t paddr_e:1;
		uint64_t reserved_50_63:14;
#endif
	} s;
	struct cvmx_fpa_int_sum_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_28_63:36;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t reserved_28_63:36;
#endif
	} cn30xx;
	struct cvmx_fpa_int_sum_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_50_63:14;
		uint64_t paddr_e:1;
		uint64_t reserved_44_48:5;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t reserved_44_48:5;
		uint64_t paddr_e:1;
		uint64_t reserved_50_63:14;
#endif
	} cn61xx;
	struct cvmx_fpa_int_sum_cn63xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_44_63:20;
		uint64_t free7:1;
		uint64_t free6:1;
		uint64_t free5:1;
		uint64_t free4:1;
		uint64_t free3:1;
		uint64_t free2:1;
		uint64_t free1:1;
		uint64_t free0:1;
		uint64_t pool7th:1;
		uint64_t pool6th:1;
		uint64_t pool5th:1;
		uint64_t pool4th:1;
		uint64_t pool3th:1;
		uint64_t pool2th:1;
		uint64_t pool1th:1;
		uint64_t pool0th:1;
		uint64_t q7_perr:1;
		uint64_t q7_coff:1;
		uint64_t q7_und:1;
		uint64_t q6_perr:1;
		uint64_t q6_coff:1;
		uint64_t q6_und:1;
		uint64_t q5_perr:1;
		uint64_t q5_coff:1;
		uint64_t q5_und:1;
		uint64_t q4_perr:1;
		uint64_t q4_coff:1;
		uint64_t q4_und:1;
		uint64_t q3_perr:1;
		uint64_t q3_coff:1;
		uint64_t q3_und:1;
		uint64_t q2_perr:1;
		uint64_t q2_coff:1;
		uint64_t q2_und:1;
		uint64_t q1_perr:1;
		uint64_t q1_coff:1;
		uint64_t q1_und:1;
		uint64_t q0_perr:1;
		uint64_t q0_coff:1;
		uint64_t q0_und:1;
		uint64_t fed1_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed0_sbe:1;
#else
		uint64_t fed0_sbe:1;
		uint64_t fed0_dbe:1;
		uint64_t fed1_sbe:1;
		uint64_t fed1_dbe:1;
		uint64_t q0_und:1;
		uint64_t q0_coff:1;
		uint64_t q0_perr:1;
		uint64_t q1_und:1;
		uint64_t q1_coff:1;
		uint64_t q1_perr:1;
		uint64_t q2_und:1;
		uint64_t q2_coff:1;
		uint64_t q2_perr:1;
		uint64_t q3_und:1;
		uint64_t q3_coff:1;
		uint64_t q3_perr:1;
		uint64_t q4_und:1;
		uint64_t q4_coff:1;
		uint64_t q4_perr:1;
		uint64_t q5_und:1;
		uint64_t q5_coff:1;
		uint64_t q5_perr:1;
		uint64_t q6_und:1;
		uint64_t q6_coff:1;
		uint64_t q6_perr:1;
		uint64_t q7_und:1;
		uint64_t q7_coff:1;
		uint64_t q7_perr:1;
		uint64_t pool0th:1;
		uint64_t pool1th:1;
		uint64_t pool2th:1;
		uint64_t pool3th:1;
		uint64_t pool4th:1;
		uint64_t pool5th:1;
		uint64_t pool6th:1;
		uint64_t pool7th:1;
		uint64_t free0:1;
		uint64_t free1:1;
		uint64_t free2:1;
		uint64_t free3:1;
		uint64_t free4:1;
		uint64_t free5:1;
		uint64_t free6:1;
		uint64_t free7:1;
		uint64_t reserved_44_63:20;
#endif
	} cn63xx;
};

union cvmx_fpa_packet_threshold {
	uint64_t u64;
	struct cvmx_fpa_packet_threshold_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t thresh:32;
#else
		uint64_t thresh:32;
		uint64_t reserved_32_63:32;
#endif
	} s;
};

union cvmx_fpa_poolx_end_addr {
	uint64_t u64;
	struct cvmx_fpa_poolx_end_addr_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_33_63:31;
		uint64_t addr:33;
#else
		uint64_t addr:33;
		uint64_t reserved_33_63:31;
#endif
	} s;
};

union cvmx_fpa_poolx_start_addr {
	uint64_t u64;
	struct cvmx_fpa_poolx_start_addr_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_33_63:31;
		uint64_t addr:33;
#else
		uint64_t addr:33;
		uint64_t reserved_33_63:31;
#endif
	} s;
};

union cvmx_fpa_poolx_threshold {
	uint64_t u64;
	struct cvmx_fpa_poolx_threshold_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t thresh:32;
#else
		uint64_t thresh:32;
		uint64_t reserved_32_63:32;
#endif
	} s;
	struct cvmx_fpa_poolx_threshold_cn61xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_29_63:35;
		uint64_t thresh:29;
#else
		uint64_t thresh:29;
		uint64_t reserved_29_63:35;
#endif
	} cn61xx;
};

union cvmx_fpa_quex_available {
	uint64_t u64;
	struct cvmx_fpa_quex_available_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t que_siz:32;
#else
		uint64_t que_siz:32;
		uint64_t reserved_32_63:32;
#endif
	} s;
	struct cvmx_fpa_quex_available_cn30xx {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_29_63:35;
		uint64_t que_siz:29;
#else
		uint64_t que_siz:29;
		uint64_t reserved_29_63:35;
#endif
	} cn30xx;
};

union cvmx_fpa_quex_page_index {
	uint64_t u64;
	struct cvmx_fpa_quex_page_index_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_25_63:39;
		uint64_t pg_num:25;
#else
		uint64_t pg_num:25;
		uint64_t reserved_25_63:39;
#endif
	} s;
};

union cvmx_fpa_que8_page_index {
	uint64_t u64;
	struct cvmx_fpa_que8_page_index_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_25_63:39;
		uint64_t pg_num:25;
#else
		uint64_t pg_num:25;
		uint64_t reserved_25_63:39;
#endif
	} s;
};

union cvmx_fpa_que_act {
	uint64_t u64;
	struct cvmx_fpa_que_act_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_29_63:35;
		uint64_t act_que:3;
		uint64_t act_indx:26;
#else
		uint64_t act_indx:26;
		uint64_t act_que:3;
		uint64_t reserved_29_63:35;
#endif
	} s;
};

union cvmx_fpa_que_exp {
	uint64_t u64;
	struct cvmx_fpa_que_exp_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_29_63:35;
		uint64_t exp_que:3;
		uint64_t exp_indx:26;
#else
		uint64_t exp_indx:26;
		uint64_t exp_que:3;
		uint64_t reserved_29_63:35;
#endif
	} s;
};

union cvmx_fpa_wart_ctl {
	uint64_t u64;
	struct cvmx_fpa_wart_ctl_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_16_63:48;
		uint64_t ctl:16;
#else
		uint64_t ctl:16;
		uint64_t reserved_16_63:48;
#endif
	} s;
};

union cvmx_fpa_wart_status {
	uint64_t u64;
	struct cvmx_fpa_wart_status_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t status:32;
#else
		uint64_t status:32;
		uint64_t reserved_32_63:32;
#endif
	} s;
};

union cvmx_fpa_wqe_threshold {
	uint64_t u64;
	struct cvmx_fpa_wqe_threshold_s {
#ifdef __BIG_ENDIAN_BITFIELD
		uint64_t reserved_32_63:32;
		uint64_t thresh:32;
#else
		uint64_t thresh:32;
		uint64_t reserved_32_63:32;
#endif
	} s;
};

#endif
¿Qué es la limpieza dental de perros? - Clínica veterinaria


Es la eliminación del sarro y la placa adherida a la superficie de los dientes mediante un equipo de ultrasonidos que garantiza la integridad de las piezas dentales a la vez que elimina en profundidad cualquier resto de suciedad.

A continuación se procede al pulido de los dientes mediante una fresa especial que elimina la placa bacteriana y devuelve a los dientes el aspecto sano que deben tener.

Una vez terminado todo el proceso, se mantiene al perro en observación hasta que se despierta de la anestesia, bajo la atenta supervisión de un veterinario.

¿Cada cuánto tiempo tengo que hacerle una limpieza dental a mi perro?

A partir de cierta edad, los perros pueden necesitar una limpieza dental anual o bianual. Depende de cada caso. En líneas generales, puede decirse que los perros de razas pequeñas suelen acumular más sarro y suelen necesitar una atención mayor en cuanto a higiene dental.


Riesgos de una mala higiene


Los riesgos más evidentes de una mala higiene dental en los perros son los siguientes:

  • Cuando la acumulación de sarro no se trata, se puede producir una inflamación y retracción de las encías que puede descalzar el diente y provocar caídas.
  • Mal aliento (halitosis).
  • Sarro perros
  • Puede ir a más
  • Las bacterias de la placa pueden trasladarse a través del torrente circulatorio a órganos vitales como el corazón ocasionando problemas de endocarditis en las válvulas. Las bacterias pueden incluso acantonarse en huesos (La osteomielitis es la infección ósea, tanto cortical como medular) provocando mucho dolor y una artritis séptica).

¿Cómo se forma el sarro?

El sarro es la calcificación de la placa dental. Los restos de alimentos, junto con las bacterias presentes en la boca, van a formar la placa bacteriana o placa dental. Si la placa no se retira, al mezclarse con la saliva y los minerales presentes en ella, reaccionará formando una costra. La placa se calcifica y se forma el sarro.

El sarro, cuando se forma, es de color blanquecino pero a medida que pasa el tiempo se va poniendo amarillo y luego marrón.

Síntomas de una pobre higiene dental
La señal más obvia de una mala salud dental canina es el mal aliento.

Sin embargo, a veces no es tan fácil de detectar
Y hay perros que no se dejan abrir la boca por su dueño. Por ejemplo…

Recientemente nos trajeron a la clínica a un perro que parpadeaba de un ojo y decía su dueño que le picaba un lado de la cara. Tenía molestias y dificultad para comer, lo que había llevado a sus dueños a comprarle comida blanda (que suele ser un poco más cara y llevar más contenido en grasa) durante medio año. Después de una exploración oftalmológica, nos dimos cuenta de que el ojo tenía una úlcera en la córnea probablemente de rascarse . Además, el canto lateral del ojo estaba inflamado. Tenía lo que en humanos llamamos flemón pero como era un perro de pelo largo, no se le notaba a simple vista. Al abrirle la boca nos llamó la atención el ver una muela llena de sarro. Le realizamos una radiografía y encontramos una fístula que llegaba hasta la parte inferior del ojo.

Le tuvimos que extraer la muela. Tras esto, el ojo se curó completamente con unos colirios y una lentilla protectora de úlcera. Afortunadamente, la úlcera no profundizó y no perforó el ojo. Ahora el perro come perfectamente a pesar de haber perdido una muela.

¿Cómo mantener la higiene dental de tu perro?
Hay varias maneras de prevenir problemas derivados de la salud dental de tu perro.

Limpiezas de dientes en casa
Es recomendable limpiar los dientes de tu perro semanal o diariamente si se puede. Existe una gran variedad de productos que se pueden utilizar:

Pastas de dientes.
Cepillos de dientes o dedales para el dedo índice, que hacen más fácil la limpieza.
Colutorios para echar en agua de bebida o directamente sobre el diente en líquido o en spray.

En la Clínica Tus Veterinarios enseñamos a nuestros clientes a tomar el hábito de limpiar los dientes de sus perros desde que son cachorros. Esto responde a nuestro compromiso con la prevención de enfermedades caninas.

Hoy en día tenemos muchos clientes que limpian los dientes todos los días a su mascota, y como resultado, se ahorran el dinero de hacer limpiezas dentales profesionales y consiguen una mejor salud de su perro.


Limpiezas dentales profesionales de perros y gatos

Recomendamos hacer una limpieza dental especializada anualmente. La realizamos con un aparato de ultrasonidos que utiliza agua para quitar el sarro. Después, procedemos a pulir los dientes con un cepillo de alta velocidad y una pasta especial. Hacemos esto para proteger el esmalte.

La frecuencia de limpiezas dentales necesaria varía mucho entre razas. En general, las razas grandes tienen buena calidad de esmalte, por lo que no necesitan hacerlo tan a menudo e incluso pueden pasarse la vida sin requerir una limpieza. Sin embargo, razas pequeñas como el Yorkshire o el Maltés, deben hacérselas todos los años desde cachorros si se quiere conservar sus piezas dentales.

Otro factor fundamental es la calidad del pienso. Algunas marcas han diseñado croquetas que limpian la superficie del diente y de la muela al masticarse.

Ultrasonido para perros

¿Se necesita anestesia para las limpiezas dentales de perros y gatos?

La limpieza dental en perros no es una técnica que pueda practicarse sin anestesia general , aunque hay veces que los propietarios no quieren anestesiar y si tiene poco sarro y el perro es muy bueno se puede intentar…… , pero no se va a poder pulir ni acceder a todas la zona de la boca …. Además los limpiadores dentales van a irrigar agua y hay riesgo de aspiración a vías respiratorias si no se realiza una anestesia correcta con intubación traqueal . En resumen , sin anestesia no se va hacer una correcta limpieza dental.

Tampoco sirve la sedación ya que necesitamos que el animal esté totalmente quieto, y el veterinario tenga un acceso completo a todas sus piezas dentales y encías.

Alimentos para la limpieza dental

Hay que tener cierto cuidado a la hora de comprar determinados alimentos porque no todos son saludables. Algunos tienen demasiado contenido graso, que en exceso puede causar problemas cardiovasculares y obesidad.

Los mejores alimentos para los dientes son aquellos que están elaborados por empresas farmacéuticas y llevan componentes químicos con tratamientos específicos para el diente del perro. Esto implica no solo limpieza a través de la acción mecánica de morder sino también un tratamiento antibacteriano para prevenir el sarro.

Conclusión

Si eres como la mayoría de dueños, por falta de tiempo , es probable que no estés prestando la suficiente atención a la limpieza dental de tu perro. Por eso te animamos a que comiences a limpiar los dientes de tu perro y consideres atender a su higiene bucal con frecuencia.

Estas simples medidas pueden conllevar a que tu perro tenga una vida más larga y mucho más saludable.

Si te resulta imposible introducir un cepillo de dientes a tu perro en la boca, pásate con él por clínica Tus Veterinarios y te explicamos cómo hacerlo.

Necesitas hacer una limpieza dental profesional a tu mascota?
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